Switch for the ATM Warren

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The Warren switch has 6 ports, and no processor. i.e. Its functions are implemented entirely in hardware. VCI remapping and VCI to route mapping are setup by sending special 'PEEK' and 'POKE' cells to the switch which cause read and write operations on the switch SRAM.

Application Examples

Home Area Network
Hotel VOD
Desk Area Network
In-flight Network

ATM Cell Format

Header : GFC=0, VPI=X, VCI=1-1023 , PT=0-3, CLP=0-1. The Warren Switch handles standard ATM cells and performs VCI switching (VPI is ignored). PT is modified by EFCI marking and CLP is used for selective discard.


- Plastic Optical Fibre
- Power on each port
- Increased Cell Buffer
- Stackability to 12 ports

Priority and Cell Buffering

Each port has a high priority output queue of 4 to 6 cells and there is a shared, central cell buffer for low priority traffic of 16 to 48 kilobytes.

The Warren Project

The ATM Warren switch is an experimental hardware device being developed at the University of Cambridge Computer Laboratory as part of the Warren Project. The Warren project is funded by Virata and has the aim of developing a set of low-cost ATM devices, including an ATM switch.

Pin Connections

RJ45 modular jack:
1 RX +
2 RX -
3 NC
4 DC 0 Volts
5 DC +7.5 to 15 Volts
6 NC
7 TX +
8 TX -

The ATM Warren Project
University of Cambridge
Computer Laboratory
New Museums Site
Pembroke Street
Cambridge CB2 3QG