The computer described on these pages was started in 1977 with the gift of a Signetics 2650 microprocessor by Mullard. Attempts during the previous year to order an Intel 8008 and a 2650 from Farnell had all proved impossible, and this 2650 processor was finally obtained after my father drafted me a letter which I sent to the Managing Director of Mullard.
The 2650 was an 8-bit processor with 32Kbyte address range and 256 I/O locations. It has 7 general purpose registers and an on-chip return address stack for subroutines with 8 entries. It was not possible to make data access to this stack or flush it to memory.
Chaos 1 and Chaos 2
There were two versions of the computer, with the first one being taken to bits to make the second. They had the same architecture and Chaos 2 was forward compatible with Chaos 1. Chaos 1 was mostly built in 1977 and Chaos 2 was built out of Chaos 1 in the summer of 1983.
Chaos 1 General View
This grainy polaroid shows Chaos 1 with its power supply in the background. The computer was made on a wooden board with keypads from old calculators mounted at the front below banks of leds. The leds showed the 15-bit A bus and 8-bit D bus and an 8-bit led register which could be written in software.
The keypad enabled data to be written to memory under DMA without the processor running. Other keys allowed run/halt and single step control of the processor as well as save and load of RAM to cassette, also using hardware DMA. Most of the function of the keypad became redundant when a machine code monitor was finally blown into a 2708 (1kx8) EPROM.
At the rear of the computer are the slot-in boards, some of which are pictured and described below. The full complement of cards for Chaos 1 was finally:
The processor was under the keypads, together with the DMA unit. The DMA unit was made of ITT RTL logic in 14 pin ICs - a pre-74 series logic family.
The metal box in the background contains the power supply. An black octal connector on the PSU, where the computer plugged in, is visible. The computer consumed about 10 amps from its 5 volt rail. Several other voltages were also available from the supply. The EPROM chip required additional +12 and -5 volt rails (as did the early DRAM chips used in CHAOS 2).
Not visible is the stack of 4 or 5 D25 connectors on the back right-hand side of the computer. These provided connection to
When the keypad and controls became redundant, they were finally removed. The top display panel became the front panel with the addition of a PSU supervisor (voltage monitor and relay) and a reset switch. Also, the set of 25 pin D-connectors was removed from the chassis to one of the plug-in cards.
This picture shows the second and final floppy disk unit. This unit had two floppy disk drives, known as "dual drive", where each drive was a Shugart SA400. These drives had 40 tracks, but were still single-sided and single-density. The unit is made of plywood 3/4 of an inch think but still, as can be seen, it was rested on foam rubber to prevent the noise of the fan and head-load solenoids from disturbing the rest of the house. Note the floppy disk holder with 4 or 6 partitions made from a shoe box.
The power supply remained in its metal box and is immediately to the right of the computer on the bottom shelf of a "Hi-Fi" unit. The multi-core cable and octal connector can be seen which connect the PSU to the machine.
On the desk is the screen and keyboard. The layout of the screen and keyboard was not ideal in terms of what we called 'human factors': apart from total lack of wrist support the keyboard is not even in front of the screen. One might think the floppy drive unit would make a good support to place the screen on, but the TV set screen could not be placed on top of the floppy drives since its scan coils interfered too much with data reading from the floppies.
The Epson MX80 printer, also visible, was a big step forward over the 32 chars per line printer I had previously built myself out of an RO-3-2513 ASCII character generator and the mechanism from a very large printing calculator. I later had to rewire my 25 pin D connector for the printer port since the IBM PC was invented and it became a pain having a different pinout from the rest of the world.
Here is a picture of me at the age of 17 playing 'Trek' on the computer, based loosely on TV's Star Trek. This game, coded in assembler, used ASCII graphics to show one `quadrant' of the universe. There were actually dozens of quadrants and one went about the universe shooting the Klingons (who were not on our side in those days) and gathering provisions at starbases.
The keyboard in this picture was the second keyboard of 3 used. Looking at it today, one can imagine that the splendid area of metal behind the keys could have been better used as a wrist support had it been placed in front of the keys. The keyboard mechanism was later taken out of this clumsy, heavy and huge metal chassis, that also contained a redundant mains power supply and ten-digit nixie-tube display. It was placed in the wooden and aluminium box shown above and elsewhere.
Chaos 1 Video Card
1978. This Video card was built in 1978 and was the first one used in Chaos. The second one is (will one day be) shown later. In the last days of CHAOS, a 9600 baud RS232 link to a terminal was used, but this could not support fast graphical games of course.
The card is based around the SFF96364 video controller IC. This provided 16 lines of text and a hardware cursor and scroll. The horizontal resolution is adjustable with a trim-pot and allowed up to 64 characters to be shown, but limited video bandwidth in the display tubes meant that using fewer characters per line was preferable for clarity.
At the top right, the card has 8 memory chips of type 2102 which are 1Kx1 SRAMs to act as a character store. Video output is via the phono/RCA connector mid-way down. A second RCA connector was added on the other side for some reason.
The card accepts ASCII characters in the form you would send to a TTY. A 15-entry ROM, implemented with diodes, detected certain control characters, including CR, LF, HT, BS, Bell and Home. The diode ROM is at the bottom, right of centre.
Characters are stored in the RO-3-2513 ROMs. 128 characters are fixed in these ROMs. One ROM for upper case and one for lower. These are situated top row, middle. The Vero edge connector is on the right. At the left are two 7805, 5-volt regulators providing 1 amp each.
The major problem with this card was that it was not memory mapped and 'cursor up' was not supported. Therefore full-screen editing was impossible. In order to get the cursor to go up at all, I finally enhanced the clear-screen function in the diode ROM so that it could also serve as a cursor home, but owing to the logic inside the controller, this still took the same amount of time as a clear-screen, which was about 1.5 seconds. Hence rather slow for interactive, full-screen editing.
The bell output was the 3.5 mm jack bottom left. This fed a speaker. The bell code (ASCII 7) was also detected in the diode ROM. I was working at IBM Hursley at the time I implemented the bell and so I attempted to imitate the rather nice bell sound generated by the IBM 3278 and 79 displays that consisted of an envelope shaper and a pair of oscillators, one providing frequency modulation of the other.
The trim-pot to the left adjusts the horizontal dot clock and the other pot adjusts the contrast of the half-brightness characters accessible by setting the 8th bit in the RAM.
The original display device used was a valve, 12 inch AC/DC TV set. I modified this to accept baseband video input. To provide mains isolation, a 200 watt isolating transformer was housed in a separate case (shown below). To replace this transformer, I thought about using video opto-isolators or video transformers to instead isolate the video, but I did not have have any suitable components. Video bandwidth was always an issue. I tried regenerating the CRT cathode using the grid bias method, but in the end I replaced the tube in the TV set and this made it sharper.
Here is the mains isolating transformer for the AC/DC set. Owing to the large number of such heavy items required to make up the computer, it was not easy to move around.
The white television set pictured above was a transistor model and so had its own internal mains isolation. I was very fortunate to be given this television by my Aunt Thelma. The RF stages had failed so it no longer worked for broadcast reception, but fortunately I did not need this and I added an RCA/phono socket on the back panel to receive baseband composite video from the computer. Apart from giving a clearer picture, being able to do away with the external isolating transformer was also a useful step forward.
Chaos One: Floppy Disk Unit
1980. Chaos 1. This floppy disk drive used a Shugart ST400 disk drive and a Western Digital 1771 controller chip. The interface to the host is a D25 connector carrying address wires A0-1 and data D0-7.
The original capacity was 35 tracks of eight 256 byte sectors, making 300 kilobytes. This was the single-density capacity of such 5-inch drives.
The front panel switches provide the following controls:
In this picture, the original drive is missing and a later 80 track, double-sided drive is fitted. This later drive has more than four times the original capacity owing to the use of both sides of the media and having 80 tracks instead of 35. It also has half the height, leaving gaps in the front panel.
Chaos 1: Cassette Interface
1978. Chaos 1. This peripheral was originally designed by my father and could load and store data to cassette at 300 or 600 baud using the 'CUTS' standard. The unit was built from TTL chips which had been taken off junk computer boards using a blow lamp.
The first version, built in 1977, operated with DMA to transfer data in and out of the system memory. The processor was not needed.
The photo shows the second version, built in about 1978-9. This has no DMA capability and ran under software control in ROM. The chaos computer was by then using a bus backplane. The edge connectors are made of cuts of 0.15 pitch Veroboard. Because these are without gold, they were fairly unreliable and needed frequent cleaning. The edge connector carries A0-14, D0-7, opreq, m/io, r/w, wait, gnd, +8, -5, +12V.
The flying leads to the cassette recorder are a DIN-5 connector for the audio and a 2.5 mm jack for motor control using the relay visible in the centre.
Chaos 1: 16 Kilobyte RAM Card
The original RAM to Chaos 1 was made of 2112 and 2012 chips, which were 256 by 4 and 1K by 1 devices with an access time of 1 microsecond. A total of 2058+256 bytes were wired up using these parts. This memory was later superseded with 2114 parts, as shown here:
Two of these RAM cards were used in the final Chaos 1 machine. Each is 16Kbytes in size and made from 2114 RAM chips. Chips were added slowly over a 2 year period as pocket money allowed more memory to be bought. Each expansion was a leapfrog with respect to the Commodore PETs we had at College (Richard Tauntons in Southampton UK), where RAM was also being added as cost permitted. Each RAM chip is 1K by 4 bits and their access time was 450 nanoseconds for the older devices and 250 nanoseconds for the newer devices.
The left-most 2K byte of memory is not fitted to the pictured card because a pair of memory holes, each of 1K byte, was needed: one for the eventual memory-mapped VDU and the other for the monitor ROM.
At the extreme left there is a socket for a 24 pin bytewide device with +12 and -5 volt supplies on pins 20 and 18, so this must have been for the 2708 EPROM, but I don't remember relocating it here.
The 2650 could address 32K of main memory, so the two memory cards together filled this up.
Chaos 1: Soundcard
The soundcard was constructed from this TI analog IC: a, so-called, complex sound generator. The SN76477 chip contained all of the major parts of an analog, monophonic synthesiser: VCO, VCF, VCA, LFO, white noise generator and ADSR transient generators. I wired this device to seven bits of a parallel output port. Each of the 128 values written produced a different tone or noise, each lasting about half a second, and ideally suitable for sound effects in Space Invaders or Pacman etc.. The eighth bit was connected to a 3.5 volt light bulb that could be flashed on and off.
Chaos 1 In Use
1981. Mr Nick Downing the IIIrd plays Pacman on Chaos 1 in room G11 Cripps building St John's College, Cambridge. The Pacman game took advantage of the programmable character set function implemented in the second video card (to be) shown above.
1981. Satan gloats over his victory: he has thoroughly beaten the machine at Reversi or Othello. This was one of the programs that it was easy to write in BASIC once the display would accept random access updates, either by POKEing into the character store, or here, using escape sequences to set the cursor position and a PRINTAT extension to the BASIC interpreter.
The keyboard in view was the second keyboard to be used with Chaos. It is the same mechanism that was inside the large blue metal case pictured earlier. The keys are still many inches above the desk, as was common with computers of this era. RSI and display screen legislation were not even thought of. I must have used that keyboard every day for many hours a day for several years, but fortunately I did not get RSI. I used to dream of opcodes though.
The three silver-bezzeled push keys on the top of the keypad in some of the pictures were provided specially for playing Space Invaders (left, right and fire), in order to reduce wear on the main keyboard. The keyboard used vertically-mounted reed switches with a ferrite ring magnet in each key that slid down over the reed as the key was pressed.
Chaos 2 General View
The computer is on the left in its nice wooden box. The box has dovetail joints, but the EMC qualities might not meet FCC-B.
The display, also seen elsewhere, is the second TV set that I modified to accept baseband video. A rear pair of phono sockets accepted mono video and mono audio. This set was a transistor set, and so the large external isolating transformer previously needed with the AC/DC set was no longer needed. The internal PSU in Chaos 2, and eventual internal harddisk, means that the whole computer could be neatly shown in this one picture (excluding floppies).
In the background is a polyphonic analog synthesiser with patch panel that I designed and built (based loosely on the ETI 4600). Originally there was a parallel cable connection between the computer and a Z80 microprocessor in keyboard scanner and voice assigner unit of the synth. This was replaced with MIDI and the MIDI cable is visable in the picture. However, CHAOS never got as far as receiving MIDI and so the parallel cable had to be reconnected to transfer data from the synth to CHAOS.
The keyboard was the third and final keyboard used with the Chaos 1 and 2 series. This keyboard was extracted with a hacksaw from the front of a much larger chassis that included a number of other keyboards and switches. A piece of wood made a new rear panel. Like the previous two keyboards, it is a parallel keyboard with shift and control functions all implemented in hardware as part of a large diode encoder ROM. Getting the n-key rollover working in hardware was a useful step forward for speed typing. Many computer scientists today don't know what n-key rollover is, so some progress is being made: it is the ability for the electronics to correctly recognise when the user presses up to n-1 new keys without having released the first one.
Chaos 2 CPU Card View
Here is a top view of Chaos 2 with its lid off. The picture shows the final configuration, with internal 5-inch hard drive.
Chaos 2 was built around one large piece of Veroboard pop-riveted to an aluminium angle frame. This card contains the 2650 processor, all of the ROM and RAM and the simple I/O ports for keyboard, floppy, RS232/serial and parallel printer.
The primary 2650 is the white 40 pin chip top left centre. The two ROMs next to it are 4K byte EPROMs. One of the veroboard-style edge connectors is implemented on the left-hand side for compatibility with Chaos 1 cards, but the I/O to the rest of the box is via the D-connector next to the internal toggle switch. The switch forced the primary processor to become tri-stated, allowing for DMA from the green edge connector. This was just for debugging.
The main memory is 32K bytes of DRAM. The DIL chips have been flattened out and mounted vertically with their upper pins bussed by a mezzanine peice of Veroboard. A second bank of such DRAM on the right-hand side served as a disk block cache.
At the right hand side there are several 7805 regulators on heatsinks for the 5 volt supply. The DRAM also required +12 and -5 volt so regulators for that are included too. There are also two 1.5 volt AA dry batteries for the real-time clock.
Chaos 2: Dual Floppy Unit
This is the controller card for the chaos 2 dual floppy unit. Again it is based on the WD1771. Double-density disks existed at this time, but this unit only supported single-density.
Chaos 2: First Hard Disk Controller
This card was the controller for the first hard disk connected to Chaos. The capacity of the disk was 20 megabyte and it had three 8-inch platters providing 5 data surfaces and a servo surface.
The controller relied heavily on the host processor for most operations, including calculation of the CRC for each block, a process that required looping in software for every bit processed, since host RAM was at such a tight premium that a look-up table was prohibited. In retrospect a better approach would be to have connected a CRC table in ROM to some parallel PIO pins to achieve hardware performance without using valuable main memory (indeed the code would have been shorter). Or to have computed it entirely in hardware with a shift register and Xor gates as usual.
The controller implemented an interface which was very much like IDE. Seeks were written via a parallel interface through to the disk drive itself, which contained an Intel microcontroller to control the voice coil head assembly. There were four differential ECL serial links for data. These were clock, read data, write data and write gate. The main function of the controller was to keep track of which sector was under the heads and to serialise or deserialise it to a small RAM within the controller that was dual-ported to the host. This RAM could hold one sector only, so there was no double buffering possible. Performance was instead enhanced with the disk block cache mentioned above.
I did not implement any FEC. When I went up to Cambridge, I asked my supervisor about it (Martin Richards) and he said that perhaps Mike Guy would know how to implement FEC. But I could not find Mike Guy and instead I used a Western Digital controller chip on the Seagate 20 MByte 5-inch drive pictured above. Much later I became a bit of an expert on Reed Solomon codes, but that was when I was designing ADSL modems...
Chaos 2: Final Spec
Main processor: Signetics 2650 processor at 800 kips.
RTC (without year function!).
16Kbyte main memory available for application (out addressable space of 32 Kbyte).
Remaining 16K used as 6K ROM + 10K RAM for the operating system.
128 Kbyte disk cache RAM
Signetics 2650 second processor for intelligent terminal.
20 Mbyte Hard Drive
Twin Floppy Disk Drives (35Kbyte each).
Intel 8088 with 64Kbyte RAM third processor for more serious application programs (O/S still running in 2650).
Originally for programming 24 pin EPROMS, this was extended for 28 pin EPROMS with the additional socket seen growing out the side.
Various red DIP plugins could be used for different EPROMS. The one installed can be seen to be marked 2764 in biro. Also we can see a 74121 in a DIL14 package with biro marking on its top. This made the programming pulse. It was one of the many chips extracted from old circuit cards and with a different numbering system painted out.
The slide switch on the corner was an on/off switch for the EPROM socket 5 volt supply. Live insertion of chips was avoided by manually operating this switch. The screw holes on the other corner are where an inverter was once installed to generate the programming voltage (21 to 26 volts).
I think this was my second generation EPROM programmer. It saw a lot of use, even commercially for a couple of companies. The first programmer is lost, but this was for 2708 devices and they needed three supply rail (+5, +12, -5) voltages.
You can see that where the varnish was sanded off the Veroboard edge connector for good contact it has corroded in the last 30 years. On the other hand, the wired side of the Veroboard is still varnished and shiny.
Carce. This was an adventure game written by Murray Fountain of IBM Hursley, where I worked as a Summer student. It used an extended WADUZITDO interpreter. The original language, published in Byte Magazine, included an interpreter and an editor in under 256 bytes and very small programs, like Hello World, would fit inside this limit too.
Slowprint. A typical program for Chaos, coded in assembler. This routine was a loadable I/O device that screen output could be redirected through to make it print at a speed reasonable for reading. We were all used to 300 and 110 baud terminals in those days and the new 'glass teletypes' were too fast and off putting in some people's view.
Lost Dutchman's Gold. Most software had to be typed in from magazines, like this adventure game. Byte published barcode versions of its listings to reduce typing for those who could afford a barcode reader. Other adventure games had their strings crudely encrypted so that the player did not read all the text of the game as he typed it in, thereby preserving some chance of a surprise while playing the game.
Star Trek. I wrote a simple Pascal compiler and here is the first page of the Trek program in Pascal. The compiled code went much faster than interpreted Basic. The program was written using mixed case, but is rendered here in upper case only owing to the limitations of the (110 baud Teletype) used for hardcopy.
Here is a transcript of a terminal session on chaos run recently. The memdis command was used to show the monitor rom contents from 0 to 2000 and the disk operating system from 7000 to 7C00. chaos session.